Field of the Invention
The invention relates to an integrated memory.
U.S. Pat. No. 4,807,193 describes a DRAM having memory cells of the one-transistor/one-capacitor type. Signals read from one of the memory cells onto a bit line are amplified by a sense amplifier. In this case, the memory cell is selected via a word line connected to a control terminal of the memory cell transistor. To ensure that the sense amplifier amplifies the information items that have been read out in good time, it has an activation input, to which an activation signal is fed which is dependent on the potential on the word line. This is intended to ensure that the sense amplifier only becomes active if the potential on the word line has reached a specific level, so that it can be assumed that the memory cell has already been selected via the word line. U.S. Pat. No. 4,807,193 relates to a memory with only one word line.